BiCS3 is the result of a collaboration between Western Digital and Toshiba. It’s the world’s first 3D NAND technology with 64 layers, up from the 48 layers seen in the previous BiCS2 tech, and will be released as devices with a 256-gigabit capacity featuring 3-bits-per-cell technology. According to WD, this will enable capacities of up to half a terabit on a single chip.
Pilot production of BiCS3 is taking place in the new Fab 2 semiconductor fabrication facility located in Yokkaichi, Mie Prefecture, Japan. WD and Toshiba announced its opening on July 15, stating that the facility will focus on converting their 2D NAND capacity to 3D flash memory. First-phase production of 3D flash memory started back in March even though the facility was partially completed.
That collaboration actually stemmed from WD’s acquisition of SanDisk back in May, who previously struck a deal with Toshiba in August 2015 to create a second generation of BiCS flash memory. The resulting device had a 256Gb (32GB) capacity and 48 layers using 3-bit-per-cell TLC (triple-level cell) technology. Thus, it was ideal for SSDs, tablets, smartphones, and other devices requiring internal storage.
BiCS actually stands for Bit Cost Scalable. It’s a three-dimensional memory technology that vertically stacks layers of memory cells like a skyscraper, enabling higher densities than normal NAND because storage expands vertically rather than horizontally, saving space. The first flash-based device based on BiCS featured a two-bit-per-cell structure and a 128Gb (16GB) capacity.
BiCS was introduced by Toshiba in 2007 as the next step in memory once the scaling limit maxed out with existing “flat” floating gate-based NAND technology. According to a lecture by Toshiba’s Akihiro Nitayama, with BiCS, numerous layers of memory cells can be created simultaneously using etching and multilayer formation technologies. He also said the BiCS technology is expected to endure for five generations. We are now into generation three based on this latest announcement from WD.
“The launch of the next-generation 3D NAND technology based on our industry-leading 64-layer architecture reinforces our leadership in NAND flash technology,” said Dr. Siva Sivaram, executive vice president, memory technology, Western Digital. “BiCS3 will feature the use of 3-bits-per-cell technology along with advances in high aspect ratio semiconductor processing to deliver higher capacity, superior performance, and reliability at an attractive cost. Together with BiCS2, our 3D NAND portfolio has broadened significantly, enhancing our ability to address a full spectrum of customer applications in retail, mobile, and data center.”
Western Digital said on Tuesday that BiCS3 devices will begin to be sampled out to OEMs this quarter, followed by volume shipments for the retail market in the fourth quarter of 2016. As for the older BiCS2 devices, WD will continue to ship those to OEMs as well as customers in the retail space.
